Title：Development of High-performance P-type Transistors
Location: Grand Ballroom, 4th Floor, Crowne Plaza Kunming City Centre
Time: 11:30-12:15, Oct. 22, 2025, Wednesday
Speaker: Prof. Yong-Young Noh, Pohang University of Science and Technology (POSTECH), Pohang, Korea

Abstract: Developing high-mobility p-type oxide semiconductors that can be grown using silicon-compatible processes at low temperatures, has remained challenging in the electronics community to integrate complementary electronics with the well-developed n-type counterparts. This presentation will discuss our recent progress in developing high-performance p-type semiconductors as channel materials for thin film transistors. For the first part of my talk, I present an amorphous p-type oxide semiconductor composed of selenium-alloyed tellurium in a tellurium sub-oxide matrix, demonstrating its utility in high-performance, stable p-channel TFTs, and complementary circuits. Theoretical analysis unveils a delocalized valence band from tellurium 5p bands with shallow acceptor states, enabling excess hole doping and transport. Selenium alloying suppresses hole concentrations and facilitates the p orbital connectivity, realizing high-performance p-channel TFTs with an average field-effect hole mobility of ~15 cm² V^-1 s^-1 and on/off current ratios of 10⁶~10⁷, along with wafer-scale uniformity and long-term stabilities under bias stress and ambient aging.

Tin (Sn²⁺) halide perovskites emerge as promising p-type candidates but suffer from low crystallisation controllability and high film defect density, which result in uncompetitive device performance. In the second part of my talk, I would like to introduce a general overview and recent progress of our group of p-type Sn-based metal halide perovskites for applying field-effect transistors (FETs). I will mainly address inorganic perovskite thin-film transistors with exceptional performance using high-crystallinity and uniform cesium-tin-triiodide-based semiconducting layers with moderate hole concentrations and superior Hall mobilities, which are enabled by the judicious engineering of film composition and crystallization. The optimized devices exhibit high field-effect hole mobilities of over 50 cm² V^-1 s^-1, large current modulation greater than 10⁸, and high operational stability and reproducibility. Next, I will introduce A-site cation engineering method to achieve high-performance pure-Sn perovskite thin-film transistors (TFTs). We explore triple A-cations of caesium-formamidinium-phenethylammonium to create high-quality cascaded Sn perovskite channel films, especially with low-defect phase-pure perovskite/dielectric interface. As such, the optimized TFTs show record hole mobilities of over 70 cm² V^-1 s^-1 and on/off current ratios of over 10⁸, comparable to the commercial low-temperature polysilicon technique level. The p-channel perovskite TFTs also show high processability and compatibility with the n-type metal oxides, enabling the integration of high-gain complementary inverters and rail-to-rail logic gates

Bio: 

Prof. Yong-Young Noh is Chair Professor of the Department of Chemical Engineering, Pohang University of Science and Technology (POSTECH). Prof. Noh is a Member of the National Academy of Engineering of Korea (NAEK) and a Fellow of the Korean Academy of Science and Technology (KAST). He received PhD in 2005 from Gwangju Institute of Science and Technology (GIST) and then worked at the Cavendish Laboratory in Cambridge, UK, as a postdoctoral associate. Afterwards, he worked at Electronics and Telecommunications Research Institute (ETRI), as a senior researcher, at Hanbat National University as Assistant professor, and Dongguk University as Associate professor. He has received many awards, including Order of Science and Technology Merit, Doyak Medal from Republic of Korea Government, and Merck Award, etc. His research interests are developing new semiconductors, including halide perovskite, metal oxide, and 2D layered materials, for electronics devices.